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Espressif Systems /ESP32-S3 /SENSITIVE /CORE_1_PIF_PMS_CONSTRAIN_4

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Interpret as CORE_1_PIF_PMS_CONSTRAIN_4

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_USB_DEVICE 0CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_USB_WRAP 0CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_CRYPTO_PERI 0CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_CRYPTO_DMA 0CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_APB_ADC 0CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_LCD_CAM 0CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_BT_PWR 0CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_USB 0CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_SYSTEM 0CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_SENSITIVE 0CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_INTERRUPT 0CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_DMA_COPY 0CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_CACHE_CONFIG 0CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_AD 0CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_DIO 0CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_WORLD_CONTROLLER

Description

Core1 access peripherals permission configuration register 4.

Fields

CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_USB_DEVICE

Core1 access usb_device permission in world0.
CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_USB_WRAP

Core1 access usb_wrap permission in world0.
CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_CRYPTO_PERI

Core1 access crypto_peri permission in world0.
CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_CRYPTO_DMA

Core1 access crypto_dma permission in world0.
CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_APB_ADC

Core1 access apb_adc permission in world0.
CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_LCD_CAM

Core1 access lcd_cam permission in world0.
CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_BT_PWR

Core1 access bt_pwr permission in world0.
CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_USB

Core1 access usb permission in world0.
CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_SYSTEM

Core1 access system permission in world0.
CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_SENSITIVE

Core1 access sensitive permission in world0.
CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_INTERRUPT

Core1 access interrupt permission in world0.
CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_DMA_COPY

Core1 access dma_copy permission in world0.
CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_CACHE_CONFIG

Core1 access cache_config permission in world0.
CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_AD

Core1 access ad permission in world0.
CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_DIO

Core1 access dio permission in world0.
CORE_1_PIF_PMS_CONSTRAIN_WORLD_0_WORLD_CONTROLLER

Core1 access world_controller permission in world0.

Links

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Register License

Copyright 2024 Espressif Systems (Shanghai) PTE LTD

Licensed under the Apache License, Version 2.0 (the “License”); you may not use this file except in compliance with the License. You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data